MOD 5 Synchronous Counter using D Flip-flop
This post is about how to design a MOD-5 Synchronous Counter using D Flip-flop step by step.
MOD 5 Synchronous Counter using D Flip-flop
Step 1: Find the number of Flip-flops needed
The number of Flip-flops required can be determined by using the following equation:
M ≤ 2N
where, M is the MOD number and N is the number of required flip-flops.
Here, MOD number is equal to 5. i.e., M = 5
Therefore, 5 ≤ 2N
=> N = 3
Therefore, to design a MOD 5 Counter, 3 flip-flops would be required.
Step 2: Write the excitation table of the flip-flop
Excitation table of D flip-flop is:
|
QN |
QN+1 |
D |
|
0 |
0 |
0 |
|
0 |
1 |
1 |
|
1 |
0 |
0 |
|
1 |
1 |
1 |
Step 3: Write the circuit state table by using excitation table
Circuit state table for designing MOD 5 Synchronous Counter using D Flip-flop would be
QA
QB
QC
QA+1
QB+1
QC+1
DA
DB
DC
0
0
0
0
0
1
0
0
1
0
0
1
0
1
0
0
1
0
0
1
0
0
1
1
0
1
1
0
1
1
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
1
0
1
X
X
X
X
X
X
1
1
0
X
X
X
X
X
X
1
1
1
X
X
X
X
X
X
QA
QB
QC
QA+1
QB+1
QC+1
DA
DB
DC
0
0
0
0
0
1
0
0
1
0
0
1
0
1
0
0
1
0
0
1
0
0
1
1
0
1
1
0
1
1
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
1
0
1
X
X
X
X
X
X
1
1
0
X
X
X
X
X
X
1
1
1
X
X
X
X
X
X
Step 4: Prepare K Map for each flip-flop input in terms of flip-flop outputs as the input variables
In this case inputs of the flip-flops are: DA, DB & DC
K Map for DA :
Therefore, DC = QA/ . QC/
Step 5: Draw the circuit using flip-flops and other gates correspond to the minimized expressions
Circuit for MOD 5 Synchronous Counter using D Flip-flop would be
In this way "MOD 5 Synchronous Counter using D Flip-flop" can be designed.
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