### MOD 8 Synchronous Counter using D Flip-flop

This post is about how to design a **MOD-8 Synchronous Counter using D Flip-flop** step by step.

__MOD 8 Synchronous Counter using D Flip-flop__

### Step 1: Find the number of Flip-flops needed

The number of Flip-flops required can be determined by using the following equation:

M ≤ 2^{N }

where, M is the MOD number and N is the number of required flip-flops.

Here, MOD number is equal to 8. i.e., M = 8

Therefore, 8 ≤ 2^{N }

=> N = 3

Therefore, to design a MOD 8 Counter, 3 flip-flops would be required.

### Step 2: Write the excitation table of the flip-flop

Excitation table of D flip-flop is:

Q |
Q |
D |

0 |
0 |
0 |

0 |
1 |
1 |

1 |
0 |
0 |

1 |
1 |
1 |

### Step 3: Write the circuit state table by using excitation table

Circuit state table for designing MOD 8 Synchronous Counter using D Flip-flop would be

Q |
Q |
Q |
Q |
Q |
Q |
D |
D |
D |

0 |
0 |
0 |
0 |
0 |
1 |
0 |
0 |
1 |

0 |
0 |
1 |
0 |
1 |
0 |
0 |
1 |
0 |

0 |
1 |
0 |
0 |
1 |
1 |
0 |
1 |
1 |

0 |
1 |
1 |
1 |
0 |
0 |
1 |
0 |
0 |

1 |
0 |
0 |
1 |
0 |
1 |
1 |
0 |
1 |

1 |
0 |
1 |
1 |
1 |
0 |
1 |
1 |
0 |

1 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
1 |

1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |

### Step 4: Prepare K Map for each flip-flop input in terms of flip-flop outputs as the input variables

In this case inputs of the flip-flops are: D_{A}, D_{B} &
D_{C}

K Map for D_{A }:

_{A}= Q

_{A}

^{/}Q

_{B}Q

_{C}+ Q

_{A}Q

_{B}

^{/}+ Q

_{A}Q

_{C}

^{/}

_{B }:

_{B}= Q

_{B}XOR Q

_{C}

_{C}:

Therefore, D_{C} = Q_{C}^{/}

### Step 5: Draw the circuit using flip-flops and other gates correspond to the minimized expressions

Circuit for MOD 8 Synchronous Counter using D Flip-flop would be

In this way "**MOD 8 Synchronous Counter using D Flip-flop" **can be designed.

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